Apple shifts to wafer-level multi-chip packaging for A20 Pro, citing thermal and bandwidth gains

Apple is said to be abandoning the InFO-PoP (Integrated Fan-Out Package-on-Package) method that has been used for its A-series chips, replacing it with a wafer-level multi-chip module (WMCM) design for the upcoming A20 Pro. The change is attributed to the need for better thermal management and higher bandwidth to support on-device artificial-intelligence workloads.

In the PoP architecture, DRAM is stacked directly on the silicon die, which can cause both components to reach thermal limits more quickly, especially under AI-intensive tasks. Sources familiar with the leak of the A20 Pro logic board indicate that the new WMCM layout separates the DRAM from the chipset die and incorporates a larger Neural Engine, potentially easing heat buildup and allowing the use of 96-bit LPDDR6 memory, though the final memory specification has not been confirmed.

Apple’s move mirrors similar packaging updates seen in its M-series processors, such as the M5 Pro and M5 Max, suggesting a broader shift across its product line. While some analysts note that Apple has lagged behind competitors in on-device AI adoption, the company appears to be addressing hardware limitations that could enable more advanced AI features in future devices.